1. Field of the Invention
The present invention relates to a metal-oxide-semiconductor capacitor (hereinafter abbreviated as MOS capacitor), more particularly, to a MOS capacitor with improved capacitance linearity.
2. Description of the Prior Art
A capacitor is one of the essential passive devices for integrated circuits (ICs). Often, capacitors occupy substantial portion of the die area for obtaining large capacitance value when compared with other components. To minimize the area occupied by the capacitors, it is desirable to make the capacitors as small as possible. And thus MOS capacitor, which occupies less area, is developed as a countermeasure to the abovementioned problem.
However, one fatal disadvantage of the MOS capacitors is its poor capacitance linearity performance over voltage range. Please refer to FIG. 1, which shows a capacitance-voltage (C-V) characteristic curve of a conventional MOS capacitor. As shown in FIG. 1, it is found that the conventional MOS capacitor is highly non-linear over its voltage operating range. Consequently, the conventional MOS capacitor is not preferable for applications require high linearity.
Therefore, there is a continuing need in the semiconductor processing art to develop a MOS capacitor having improved capacitance linearity.